Design and simulation of the LOW RISC II/sub R/

We present an analysis of the decision making process adopted by the LOW RISC Design Group which led to the microarchitecture level design of the LOW RISC II. By investigating the fundamental factors relating to the design of RISC machines and logic programming, we have derived a general design methodology for application-specific RISC processors. The details relating to the choice of specific design schemes are explained, while at the same time we engage in practical design work by proposing alternative design schemes. The resultant architecture is called the LOW RISC II/sub R/, the subscript denoting a redesign. >