Gate stress study on High Voltage MOSFET for Non-Volatile Memory applications
2014
In this paper, gate stress has been studied on High Voltage p- and n-MOSFETs used for Non-Volatile Memory applications. For the first time, a higher degradation on n-channel transistor compared to p-channel transistor has been observed. Time dependence, recovery effect, voltage acceleration factor and activation energy have been evaluated.
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