FSM synthesis on FPGA architectures

We present a new approach for FSM synthesis on the two most popular FPGA architectures: Actel and Xilinx. This approach deals with state assignment, optimization and mapping problems. Very fast FPGA mapping techniques based on multi-ROBDD representation (Shared, Reduced and Ordered BDDs) have been defined that allow the target architecture to be really taken into consideration during all the phases of the synthesis, A prototype has been developed for FSM synthesis on Xilinx X3090 and Actel ACT1 architectures. The results are promising when compared with traditional approaches implemented by Sis. >