Portion exhausted SOI MOS transistor preparation method

2007 
This invention provides a method for preparing partly exhausted SOI MOS transistors, in which, the character of the transistor is that inbuilt insulation layer is a concave structure with channels at it and the upper part of the channel region is light doped or non and the lower part is heavily doped, and the method provided here is characterized that the form of the built-in insulation layer of the concave structure is self-aligned and self-stopped, namely, the initial heavy dope in the leak region is realized by ionic injection with grid electrode as the mask, and the isolation layer of the source and drain with a quasi-grid layer is formed by eroding said heavy doped layer and filling medium, therefore, the processed apparatus has the character of self-alignment of the source and drain with the grid and the selection of the erosion of the heavy doped region can stop at the light doped region.
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