The front end board for the atlas liquid argon calorimeter

The very high collision rate and the scarcity of interesting events foreseen at the future Large Hadron Collider at CERN require the development of new types of readout electronics structures. Among those, the dual port analog memories provide the possibility to decrease the high rates of incoming data. These memories allow indeed to perform the analog to digital conversion only after the level 1 trigger, thus dividing by at least a factor 100 the amount of samples to digitise, and to use much slower ADCs. Nevertheless, this induces that they are able to sample the incoming analog signal at high frequency (40 MHz for the LHC) and to store it waiting for the level 1 trigger latency. Moreover, the very high dynamic range of the detector signal requires the analog memory to cover at least 12 bits of resolution, even with a multigain system. The Laboratoire de l’Accelerateur Lineaire (LAL) from Orsay, the Nevis Laboratories from Irvington, the University of Alberta from Edmonton and the CEA-DAPNIA from Saclay have developed a complete readout solution to fit the requirements of the ATLAS liquid argon calorimeter system. The upstream part of the chain consists in warm preamps followed by tri-gain bipolar shapers, dual port analog memories (also named “ analog pipelines ” or “ Switch Capacitor Arrays ”), and 12bit-5MHz ADCs. All these components are gathered on a large board, which provides the readout of 128 calorimeter channels. The first prototypes of the board give entire satisfaction.