Self-Aligned Low-Schottky Barrier Deposited Metal S/D MOSFETs with Si 3 N 4 M/Si Passivation

We demonstrate a self-aligned process for forming fully- depleted SOI MOSFETs with deposited metal-silicon S/D junctions and gate lengths as short as 75 nm. For the devices presented here, the metal S/D regions were formed of deposited Al which is self-aligned to the gate and STI edges, with Si 3 N 4 junction passivation to suppress Fermi-level pinning. Inverse modeling of the electrical data indicates the effective Schottky barrier height at the source and drain junctions is no more than 0.22 V without the use of low-workfunction metals or strain engineering. Optimization of Si 3 N 4 passivation is needed to realize the full potential of this technology.