Binary system adder-subtractor based on enhancement-type LUT (look up table) 5 structure

The invention relates to a binary system adder-subtractor, and discloses a binary system adder-subtractor based on an enhancement-type LUT (look up table) 5 structure. According to the invention, the binary system adder-subtractor comprises an enhancement-type 5 input LUT structure, a carry chain structure and a standard xor structure; addition and subtraction logic of two digits is realized for the LUT5 structure by utilizing a LUT 4 with two 3 input share; the port resource utilization ratio achieves 4/5; when controllable addition and subtraction logic (with addition and subtraction control signal input) is realized, the port resource utilization ratio even achieves 5/5=100%; compared with the existing individual 4 input LUT, one digit addition and subtraction is realized, the port utilization ratio is increased by 30%, and the area utilization ratio is improved greatly. Additionally, the carry chain structure comprises two carry look ahead structures; two carry chain logic delays are lowered from two traditional selectors to delay time of a tristate phase inverter; the digit transmission delay is reduced; and the working frequency of the adder-subtractor is improved.