Modeling and Characterization of a Hermetic Ceramic Package and Its Performance Impact on a 1.5-7V Input, 3-A, Radiation-Hardened Ultra-Low Dropout (LDO) Regulator

This paper presents an improved 3D methodology developed to accurately model and characterize the performance impact of the package manufacturing process variations (viz. Au/Ni plating and AgCu) on drain to source resistance RDS(ON). DC resistance discrepancy between modeling and silicon measurement correlation improved from 28% to 2% with the refined co-design modeling methodology. Best-in-class, ultra-low resistance measurement techniques, were employed to properly characterize device performance. Further improvement is currently underway with goal to minimize difference between simulation and silicon measurement. The improved modeling and characterization is demonstrated on TI TPS7H1101A-SP, a space rated 3-A ultra-low low-dropout regulator.