Design of integrated reversible fault-tolerant arithmetic and logic unit

Abstract In recent years, design of low power high-speed nano computing systems have drawn more attention. Reversible Logic is a technique popularly used to design the computing systems to achive them. In a computer, the arithmetic logic unit (ALU) is the fundamental computing module. In this paper, a novel Reversible Arithmetic and Logic Unit is proposed, where a single module performs both arithmetic and logical operations. The possible arithmetic operation includes transfer, addition with carry, subtract, complement and increment. The possible logical operations are AND, OR, XOR, COPY and CONSTANT. The control signal is a key element which defines and alters the data path in order to produce either arithmetic or logical output. The fault-tolerant KMD gates are utilized to construct the ALU. Here, two approaches are discussed for the construction of ALU. In the first approach, ALU is constructed using KMD gates only, whereas in the second approach, combination of KMD, Toffoli and Fredkin gates are used. The functional realization is performed in Quantum Cellular Automata. Quantum circuit is also derived for the same. The obtained results are evident for the improved Quantum cost up to 69%, Constant input up to 40% and Number of gates up to 21% compared to the existing designs.