Scalable GaN-On-Silicon Using Rare Earth Oxide Buffer Layers

2012 
Growth of GaN on large diameter silicon wafers with controlled wafer bow has become one of the most challenging problems in the power electronics industry. Large area wafers with 5-6μm GaN layers usually exhibit large wafer bow due to the thermal expansion coefficient mismatch between GaN and silicon substrates, which can lead to cracking of the epi layers upon cool-down. Cracking is a serious problem for the industry and typically renders the wafers unusable for device applications. Several approaches has been tested to engineer strain evolution during growth to mitigate wafer cracking. Low temperature AlN interlayers [1], implantation by N ions has been investigated as methods of obtaining crack free films on silicon (111). Shahedipour-Sandvik et. al [2-4] has reported implantation of AlN/Si layers by N ions and subsequent annealing as a way method to obtain defective layer of silicon under AlN to mitigate strains arising during subsequent growth. This method results in specular GaN surfaces with edge dislocation densities around 8x10/cm. In this talk we present our approach to scalable GaN on silicon growth with controlled wafer bow through the use of rare earth oxide (REO) buffer layers and the elimination of wafer cracking. REO buffer layers are epitaxially grown on silicon (111) substrates due to their favorable lattice constant which is close to twice that of silicon (0.5% mismatch for Gd2O3). Single crystal, high quality epitaxial REO layers on silicon substrates are achieved by solid state epitaxy. The growth of thick layers of oxide on silicon causes the silicon wafer to bow under the stress of the oxide film. The control of bow during GaN growth is achieved by primarily choosing an oxide with a certain composition and pre straining the silicon wafer before the growth of GaN. The lattice parameter of the oxide can be varied by varying the rare earth constituent elements; similar to that of compound semiconductors. Figure 1 shows the variation of the XRD pattern and the corresponding lattice parameter with the composition of the oxide layers deposited epitaxially on silicon (111). By changing the composition of the oxide layer different strain levels can be, in principle, be applied to the silicon wafer. In our experiments we have determined a relation between the resultant bow of silicon and the thickness of the oxide layer for Gd2O3 epilayers as shown in Figure 2. The growth of Gd2O3 has resulted in a maximum bow of 30μm at the edge of a 100mm wafer which was subsequently counteracted by growth of GaN on top of the oxide layer. Growth of GaN on top of the rare earth oxides results in templates which can be further thickened up in an industry standard MOCVD reactor. The structural properties of the GaN material was characterized by double crystal x-ray diffraction. Initially the GaN layers exhibit fair (002) linewidths in the range of 1800arc seconds, however, upon MOCVD growth of 0.5μm of GaN linewidths show substaintial decrease to sub 900 arc seconds. Smooth surfaces conducive to device applications with sub nanometer RMS roughnesses on 20μmx20μm scans are also obtained post MOCVD growth. We attribute this to the recrystallization of the underlying GaN tampleate under high growth temperatures of MOCVD and anhillation of dislocations occurring at the interface. Scaling of REO materials to 200mm wafers with in-situ bow data also represents similar trends for the evolution of bow. Rare earth oxides scaled to 200 mm wafers exhibit superior crystalline quality and less than 1% thickness uniformity across the entire wafer. Growth of GaN on REO templates at the 200mm wafers with in-situ bow data will be presented in greater detail.
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