Fault Tolerant VLSI Design Assessments for Advanced Avionics Department

Abstract : With the advances in VLSI technology, it will be possible to fabricate chips with 100,000 to 500,000 gates per chip. Rather the technology to pack more and more elements on a chip has outpaced the collective knowledge for effective use of chip real estate. For example, it is virtually impossible to test high density microcircuits. This report reviews the existing literature on VLSI technology with regards to proposed methods to increase reliability and testability. One of the critical problems of high density microcircuits is the limited number of I/O pins. The present literature points out the two types of integrated circuit additions that can improve circuit reliability. The reports also provide a list of references for further study of Fault-Tolerant Computing. (KR)