Double-Poly EEPROM Cell for High Density Memories using Positive and Negative Voltage Programming
1996
This paper will present a very compact EEPROM cell for high density applications, featuring split voltage programming. The information is stored in a self-aligned floating-gate transistor with thin (8nm) tunnel oxide. Bit selection is performed by a low-voltage transitor. Long endurance (more than 10 6 cycles) is achieved and the asymmetric window closing will be explained. The innovative cell concept has been validated on a 256k parallel EEPROM device.
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