Near-Threshold CORDIC Design with Dynamic Circuitry for Long-Standby IoT Applications

IoT edge devices require ultra-low leakage for lowly duty-cycled applications. The prior designs only show the all-N-type ripple carry adder (All-N-RCA) outperforming the static RCA design based on simulation results. To verify the feasibility and to increase the confidence level of applying dynamic circuit to the near- Vt SoC design, the design vehicle must be at least a pipelined design. We then propose the useful DSP kernel, the COordinate Rotation DIgital Computer (CORDIC) to be the test vehicle in this work. The core circuits of CORDIC ‘logarithmic shifter’ and ‘adder’ are replaced by dynamic circuit to build up proposed dynamic CORDIC. The static CORDIC and dynamic CORDIC are evaluated according to pre-layout simulation results in 28 nm CMOS technology. For an IoT application with a 0.02% and 0.2% duty cycle, the proposed dynamic CORDIC can achieves a 41% and 30% energy reduction compared to the static CORDIC at the typical process corner.