Improved Erasing Speed in Junctionless Flash Memory Device by ${\rm HfO}_{2}/{\rm Si}_{3}{\rm N}_{4}$ Stacked Trapping Layer

A junctionless (JL) polycrystalline-based flash memory device with HfO 2 /Si 3 N 4 (HN) stacked trapping layer is studied for the first time. Effects of the HN stacked trapping layer on JL and inversion-mode (IM) flash devices are compared. JL device shows faster programming speed than the IM one because of its heavily doped n-channel. Specially, comparable erasing speed of JL device can be achieved by HN stacked trapping layer due to more effective electron detrapping. JL device with HN stacked trapping layer also shows better retention characteristics and keeps a larger window after 10 5 programming/erasing cycles, which makes it promising for 3-D memory integration in the future.