Method for operating flash memory chips

2005 
A method for operating flash memory chips is provided to reduce the total operation time by simultaneously operating NAND type flash memory chips in one package even while a part of the memory chips are operating. Operational commands and addresses are sequentially applied to N flash memory chips(S101~S103). The operation time of the first flash memory is checked, and each operation time of the first to N-th flash memory chips is sequentially checked and then the operation time of the first flash memory is checked again if the operation of the first flash is not finished(S104). If the operation of one of the first to N-th flash memory chips is finished, it is checked whether the page of the finished flash memory chip is the last page(S105,S106). The operation time of the next memory chip is checked if it is the last page, otherwise, an operation command and an increased address are applied to the finished flash memory chip and then the operation time of the flash memory chip is checked(S107~S109).
    • Correction
    • Source
    • Cite
    • Save
    • Machine Reading By IdeaReader
    0
    References
    0
    Citations
    NaN
    KQI
    []