Process for producing an integrated circuit comprising a low contact resistance with auskleidungssilizid
2015
An integrated circuit comprising a substrate carrying a transistor having a source region and a drain region. A delta doped with a high impurity concentration layer is provided on the source region and drain region of the transistor. A contact set extends through a Vormetalldielektrikumschicht covering the transistor. A silicide region being provided on a lower side of the contact set. The silicide is formed by a Salizidierungsreaktion between a metal that is present at the bottom of the contact, and the delta doped with a high impurity concentration layer on the source region and drain region of the transistor.
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