Soft error reliability improvements for implantable medical devices

As the expectations of physicians and patients have matured, the desire to utilize advanced CMOS technologies to provide increasingly sophisticated therapeutic and diagnostic capabilities has grown. This has pushed the high reliability implantable device business into the use of processes that are much more susceptible to soft error events than in the past. This paper discusses experimental and modeling results of logic upsets in a 0.25 mum CMOS IC process.