Method for selective succession of instruction processing in superscalar processor and system for the same
1993
PURPOSE: To provide a method and system for improving instruction dispatch efficiency in a superscalar processor system in which a series of scalar instructions can be fetched in a sequence designated by an application, and simultaneously a series of scalar instructions can be non-successively dispatched to plural executing units as necessary. CONSTITUTION: A series of scalar instruction non-successively fetched in a sequence designated by an application as necessary are processed. Here, a condition necessitating succession during the processing is detected. The processing of the specific scalar instructions among a series of scalar instruction is selectively controlled according to the detection of the condition necessitating succession, and afterwards at least one part of a series of scalar instructions are successively processed.
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