A process for the production of metal gate electrode structures with large ε by means of a cover layer early adaptation

In the manufacture of metal gate electrode structures with large e in transistors of different conductivity type with incorporation of an embedded strain-inducing semiconductor alloy selectively in a transistor type a better process uniformity is achieved by the thickness of a dielectric capping material of a gate layer stack is reduced over the active area of ​​the transistors selectively, the strain-inducing semiconductor alloy not received. In this case, a better coverage and thus a better integrity of sensitive gate materials in process strategies is achieved, in which the complex metal gate electrode structures are manufactured with large e in an early manufacturing phase, while in a replacement gate method, a better process uniformity in exposure of the surface of a dummy electrode material is achieved.