A Parallelizable Adaptive Method to Update Close-Loop Digital Predistorter for RF Power Amplifiers

This paper presents a parallelizable adaptive method to estimate and update close-loop digital predistorter for RF power amplifiers. The proposed scheme can be realized with multiple processors which can save computational time and be used in real-time implementation. By using a three-carrier wideband code-division multiple access (WCDMA) signal, the scheme is tested in the way of 3 branches in Nios II. Results show that the performance is approximate to that based on RLS algorithm and the time the scheme expensed is much less than that RLS needed.