TiN barriers for high-k capacitors: simulations and experimental results

Abstract High k dielectric materials have drawn a lot of attention for gate dielectric applications as substitutes for SiO 2 in future ULSI devices and storage capacitors in GBit DRAMs. Tunneling currents become a major problem with shrinking device geometries. Capacitor stacks with high k dielectrics like BST or Ta 2 O 5 will need barriers like TiN to avoid intermixing between poly-Si and electrode material. A new clusterable RTCVD module for TiN deposition using TiCl 4 and NH 3 chemistry was developed and built up by STEAG RTP Systems GmbH. The design of the reactor was strongly supported by simulations and methods of experimental design. Simulations on the behaviour of TiCl 4 and NH 3 process gas flows during process conditions in the RTCVD reactor chamber using Lennard Jones Potential approximation and Phoenics CVD software show that the two main gas species TiCl 4 and NH 3 behave very different and thus thoroughly have to be treated individually. We demonstrated and discussed gas flow homogeneity distributions of different reactor designs and constraints and show how the obtained results led us to the chamber design, which finally was realized. Experimental cross checks on TiN deposited wafers processed with our new RTCVD reactor for TiN barrier are shown and the results are discussed in detail.