Fabrication and characterization of a self-aligned gate stack for electronics applications

A metal–oxide–semiconductor (MOS) gate stack that is self-aligned with the underlying silicon doping profile is demonstrated. We combine a new hybrid bottom-up patterning technique with atomic layer deposition (ALD) to selectively deposit a platinum-hafnium dioxide-silicon MOS gate stack. A poly(methyl methacrylate) (PMMA) brush is blanket grown from a Si(100) surface and selectively removed from the lightly doped (∼1018 cm−3) regions using a doping-selective KOH etch. The PMMA brush that remains on the heavily doped (∼1020 cm−3) regions effectively blocks the ALD of both HfO2 and platinum. MOS capacitors exhibit promising capacitance-voltage characteristics with a HfO2 dielectric constant of ∼25 and an average interface state density of 2.1 × 1011 eV−1 cm−2 following forming gas anneal.