Parallel Matrix Multiplication Design for Monocular SLAM

As software profiling is conducted to determine which section of program demand high processing computation in monocular SLAM inverse depth estimation, matrix multiplication is identified to be one of the most time consuming process. The processing is more demanding when the number of features inserted to the image is increased. For that reason, this paper proposes a parallel matrix multiplier design which could accelerate the execution time. In this design, Field Programmable Gate Array (FPGA) technology which allows parallel design to be implemented is presented. The design manipulates existing classical matrix multiplication algorithm into an architecture that would enable data to be processed concurrently.