A $D$ -Band Wideband High-Gain Low-Noise Amplifier in 55-nm CMOS

This paper proposes a wideband high-gain low noise amplifier (LNA) using GlobalFoundries 55-nm CMOS technology. The LNA is implemented with a 3-stage common-source (CS) topology utilizing gain-boosting and transformer-matching techniques. The proposed LNA achieves a gain of $19.2\pm 0.5\ \text{dB}$ and a flat low noise figure under 6.7 dB from 126–136 GHz, shows a 3-dB bandwidth of 15 GHz (123–138 GHz), and output power 1-dB compression point of −2 dBm, while consuming 47.5 mW from a single voltage supply of 0.9 V. The chip area including the pads is 0.36 mm2.