Timing Error-Aware Microcontroller

The error detection and correction design space was presented in Chap. 5. It discussed the different implementation considerations to be made when realizing a state-of-the-art EDAC system. As such, it created a framework to navigate when analysing or implementing an effective EDAC system. A key observation when looking at state-of-the-art is that few EDAC strategies enable ultra-low voltage operation. Considering that ultra-low voltage designs are most susceptible to over-design, EDAC operation can be a key enabler for effective ultra-low voltage systems.