Radiation Hardened High-Speed LVDS compliant Transceiver

In this work, RHBD (Radiation Hardened by Design) LVDS (low-voltage differential signaling) transmitter and receiver are designed and simulated using a standard 180 nm CMOS technology having power consumption of 3mW and 3.3mW respectively. These components have been simulated up to a data rate of 1 Gbps. The simulation results, performed at various PVT variation show a complete compatibility with the LVDS standard rules. In particular, RHBD is implemented by reducing high impedance nodes and using analog cancellation of charge injection by implementing high-speed detection and mitigation scheme to prevent even a single bit of error. At the positive feedback comparator RHBD is done using TMR and in the transmitter, susceptible nodes are radiation hardened by increasing the node capacitances and by CMFB loop.