Wideband High Power Doherty Amplifiers

Currently the Doherty Power Amplifier (DPA) is replacing the traditional Class B amplifier in base-station and broadcast applications, as such becoming the preferred choice of industry due to its simplicity and high efficiency performance. In spite of its success, so far practical DPA implementations can provide only a very limited RF bandwidth, which tends to narrow down even more at higher power levels. This narrowband behavior of the DPA is mostly caused by the use of traditional operating classes for the active devices and bandwidth restrictions related to use of a conventional impedance inverter. In this work, the bandwidth of different DPA topologies has been analyzed, followed by a discussion of recent techniques that can help to improve the DPA bandwidth. To overcome the remaining bandwidth limitations in a DPA design, a novel differential configuration was proposed. In this approach, transmission line based baluns are used to implement the desired wideband 2nd harmonic terminations of the active devices. By combining this technique with a novel wideband impedance inverter, excellent DPA wideband performance can be achieved. Unfortunately, when going to practical balun implementations, various imperfections come to light, which trouble the achievable DPA bandwidth performance. For this reason, three practical balun structures are investigated in detail, namely, the coaxial cable based balun, the vertically installed planar balun and suspended planar stripline balun. To explore the proposed DPA concept when using practical baluns, two DPAs featuring mixed-signal driven inputs are presented. A dedicated design procedure for these DPAs is also given. The first prototype is implemented using NXP GaN devices and coaxial cable based baluns. Simulation results show a maximum output power of 52dBm, but in 6dB power back-off we only reach 40% efficiency from 530MHz to 700MHz, which is significantly less than the intend bandwidth (450MHz-810MHz). Using the lessons learned of this first amplifier, a second design with NXP LDMOS devices and suspended planar stripline balun has been developed. According to simulation this later design provides a maximum output power of 59dBm with the efficiency above 55% at both full power and 6dB power back-off. According the simulations this second design can even achieve 50% efficiency at 8dB back-off. The related center frequency is 650MHz with a high-efficiency bandwidth at 6dB power back-off (efficiency within 10% of its maximum) from 460MHz to 790MHz.