Diffusion process method of ion implantation in use for gate electrode capable of switching off thyristor

2006 
An ion implantation diffusion technique method for a gate turn-off thyristor (GTO) adopts the ion implantation diffusion technique. During procedure for fabricating the GTO, in the impurity distribution of cathode face of chip, the designed voltage value VGK of PN junction voltage at boundary (mark 20mum) is demanded as 20-21V accurately. Thus, calculated V/I value of impurity concentration at boundary should be controlled at 10-11; and degree of consistency should be controlled at +/-5%. Dual impurity distributions of boron and aluminum are adopted for P type impurity. Junction depth is dependent on aluminum. Concentration, and degree of consistency at surface, and sub surface of silicon chip is dependent on boron.Through external N type phosphorus impurity in high concentration, using diffusion process of ion implantation ionizes adulteration atoms. Using electron gun strikes ionized adulteration atoms to silicon chip in high speed. Boron ion implantation and diffusion is carried out first; and then aluminum ion implantation and diffusion is carried out.
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