High voltage level shifter for RF-MEMS control matrix with very low DC current leakage

A level shifter with minimum static power consumption for a high side operation up to 42V was designed. Due to a current leakage below 500 nA the high side voltage can be provided by a on-chip charge pump. The level shifter core has a high side output signal rise and fall time of 200 ps. The level shifter core circuit was extended with an output buffer to drive the parasitic impedance of the measurement setup that consists of a 65 pF capacitor in parallel with a 1MΩ resistor. An output signal rise and fall time of 15 ns was measured. The measured current was mainly caused by the resistive load. Multiple level shifters can be combined creating a compact and area efficient array. The circuit was designed in a triple well 0.25µm SiGe:C BiCMOS process which includes a LDMOS- and a RF-MEMS module.