Surface passivation of silicon photonic devices with high surface-to-volume-ratio nanostructures

Recently, a high-speed and high-efficiency silicon photodiode (PD) was demonstrated by enabling light trapping micro/nanostructured holes. While attractive for light manipulation, these high surface-to-volume-ratio nanostructures, which are created by top-down dry etching processes, can also bring other challenges, such as creating silicon surface damage and crystalline defects. To reduce the dark current level and minimize surface recombination, successful passivation is a vital step to achieving the ultimate performance of the silicon PD based on photon-trapping structures. In this paper, we present and compare several effective silicon surface passivation schemes including plasma-enhanced chemical vapor deposited SiO2 and Si3N4, hydrofluoric acid (HF) treatment, thermal oxidation, and low ion energy dry etch. These passivation techniques can reduce the dark current by more than 4 orders of magnitude, bringing it down to the nanoampere level. Among these passivation schemes, HF treatment is relatively simple and cost effective, while other techniques may alter the light trapping characteristics of silicon PDs to some extent, thus affecting their external quantum efficiency. The passivation techniques discussed in this paper are CMOS compatible and can also be applied to other silicon photonic devices, such as photovoltaics.