4.5 The Xeon® processor E5-2600 v3: A 22nm 18-core product family

The next-generation enterprise Xeon server processor maximum configuration supports 18 dual-threaded 64b Haswell cores [1], 45MB L3 cache, 4 DDR4-2133MHz memory channels, 40 8GT/s PCIe lanes, and 60 9.6GT/S QPI lanes. The processor has 5.56B transistors on a 31.9mm×20.8mm die in Intel's high-K metal-gate tri-gate 22nm CMOS technology [2] with 11 metal layers and achieves a 33% performance boost, on average, over previous generations [3]. Two additional metal layers enable area optimization and performance improvement. The design supports a wide range of configurations, including thermal design power ranging from 55 to 165W and frequencies ranging from 1.6 to 3.8GHz. Fig. 4.5.1 shows the processor block diagram of the 18 core die. The floorplan allows for core and cache communication via a ring interconnect, as well as the ability to deliver derivative designs with lower core counts. The 4 th column in the 18-core die is removed to implement the 12 core chop, and the 3 rd column is removed for an 8 core chop. Key architectural innovations include the addition of AVX2 technology, DDR4, and fully integrated voltage regulators (FIVR) [4] that enable per-core p-states and uncore frequency scaling.