Design of the Time Keeping System Based on FPGA and SCM

The current situation and the important role in power system of the time keeping system is described. It analyzed some questions which has been met in the development of the time keeping system and designed a time keeping system by GPS or Beidou as time mark.The double constant temperature trough crystal oscillator MV180 was used as the input clock of system, and used SCM control DAC7512 to adjust its frequency. The system carries on the frequency division processing to the adjusted local clock signal, then compares with the standard second signal received by the GPS or Beidou, adjusts the phase of the signal through frequency division by using FPGA and SCM, and finally, outputs the standard second pulse. It also can maintain the signal invariably after GPS or Beidou lock-lose to achieve the time synchronization of power system.