Materials basis for a six level epitaxial HTS digital circuit process

We have developed a process for fabrication of HTS single-flux-quantum logic circuits based on edge SNS junctions which requires six epitaxial film layers and six mask levels. The process was successfully applied to fabrication of small-scale circuits (/spl les/10 junctions). This paper examines the materials properties affecting the reproducibility of YBCO-based SNS junctions, the low inductance provided by an integrated YBCO ground plane, and electrical isolation by SrTiO/sub 3/, or Sr/sub 2/AlTaO/sub 6/, ground-plane and junction insulator layers. Some of the critical processing parameters identified by electrical measurements, TEM, SEM, and AFM were control of second-phase precipitates in YBCO, oxygen diffusion, Ar ion-milling parameters, and preparation of surfaces for subsequent high-temperature depositions.