Implication of unsafe writing on the MAGIC NOR gate

Abstract The memristor-aided logic (MAGIC), which is only composed of memristors, can realize the in-memory computing and then break the wall between storage and computation. However, the inherent stochastic switching behaviour is exhibited in the memristor including temporal variations and spatial variations. Write operation might fail due to the variation of threshold voltage. When such unsafe writing phenomenon is performed, the reliability problem could make the delicate logical design break down. In this paper, we analyzed the implication of unsafe writing on the MAGIC gate with the VTEAM model systematically. The mathematical relationship between MAGIC gate reliability and switching probability has been deduced combined with the Markov chain model of unsafe writing, which is in accordance with simulation results. It demonstrates that with the appropriate device property and the appropriate operation time, unsafe writing may make the possible MAGIC NOR gate converge to always NOR logic. Furthermore, the best operation time for unsafe writing is proposed to improve the probability of right logic gate and avoid the undesired logic result, when the device cannot meet the requirement.