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低遅延レイヤ2スイッチにおける自律型Time Aware ShaperのFPGA試作
低遅延レイヤ2スイッチにおける自律型Time Aware ShaperのFPGA試作
2019
kazuhito nisimura
masaki hirota
takafumi terahara
hideki matui
Keywords:
Computer network
Latency (engineering)
LAN switching
Computer science
Correction
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