Depletion and enhancement mode InP high electron mobility transistors fabricated by a dry gate recess process

1998 
We report depletion and enhancement mode InP high electron mobility transistors (HEMTs) fabricated using CH/sub 4//H/sub 2/ selective dry etch gate recess process. Under the etching conditions developed, the process has a In/sub 0.7/Ga/sub 0.3/As to In/sub 0.52/Al/sub 0.48/As selectivity of 130. The dc threshold voltages of the devices fabricated in this way increase from -1.3 V to 0.1 V as a function of dry etch time, with an extrinsic transconductance of 520 mS/mm in the depletion mode and 800 mS/mm in enhancement mode. The devices exhibit an extrapolated cut-off frequencies of 150 GHz. This work demonstrates the potential of the use of dry etching as a gate recess technology for the future development of high frequency InP-based circuits.
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