Programmable static random access memory (SRAM) time sequence control system based on build-in self-test (BIST) control

The invention relates to a programmable static random access memory (SRAM) time sequence control system based on build-in self-test (BIST) control, which comprises a BIST module, a control unit and an SRAM module which contains a programmable time sequence control module. The programmable SRAM time sequence control system is characterized in that the programmable time sequence control module is provided with a programmable read/write time sequence control circuit, a word line (WLL) load copying unit and a read/write bit line load copying unit, the input of the programmable read/write time sequence control circuit is read/write control signals which are output by the control unit, the output of the programmableread/write time sequence control circuit is respectively connected with the input of the WLL load copying unit and the input of the read/write bit line load copying unit, the programmable read/write time sequence control circuit additionally outputs Rref signals which are connected with the enabling end of a sensitive amplifier time sequence control circuit, and the output of a WLL drive copying unit in a secondary decoding and WLL drive circuit is connected with the time sequence end of the programmable read/write time sequence control circuit.