Scanner alignment performance for double patterning

Double patterning with Spacer (DPS) is now widely accepted as a viable technology for the further extension of 193nm lithography towards the 22nm /18nm technology nodes. DPS was primary introduced for the manufacturing of flash memory due to its 1D design geometry. However, DPS is now becoming a main stream technology for advanced technology nodes for logic product. DPS results in alignment and overlay marks with reduced image contrast after completion of spacer patterning. Consequently there is an elevated risk that the overlay performance of the cut lithography layer on the spacer [1] may be negatively impacted. Initial studies indicate that it may be necessary to consider new mark designs. In this paper, we discuss the basic design of the Nikon alignment marks and make a statistical assessment of their relative performance. The self aligned spacer process results in asymmetric spacers. That are two types of surface (inside and outside) of the spacer are formed. The impact of this asymmetry is also being assessed. Mark geometries are characterized with 3D-AFM measurement and alignment / overlay performance analysis.