A new approach to characterize and predict lifetime of deep-submicron nMOS devices

Experimental results indicated that the widely used power-law model for lifetime estimation is inaccurate for deep submicron (< 0.25 /spl mu/m) devices. It underestimates the lifetime for large substrate hot-carrier stressing. This observation is attributed to current components that do not induce device degradation, such as the gate tunneling current and base current of parasitic bipolar transistor, in substrate current and gate current. A better lifetune prediction method is proposed for the deep-submicron devices.