CCII-Based Voltage Amplifier Optimization for Reduced Relative Gain Error

This paper describes strategies to design voltage amplifiers, based on the second-generation current conveyors, CCIIs, with a relative gain error (RGE). The approach is independent from the internal architecture of the employed CCII and allows to reduce the RGE of the overall amplifier by taking into account the main CCII non-idealities. In particular, it describes how to evaluate the specific optimum resistive loads minimizing RGE, also proving that these values are independent from the CCII internal implementation and related only to the parasitic components at X and Z nodes as well as to the desired ideal voltage gain. In order to validate the proposed design methodology, the commercial component AD844 has been considered as the CCII. Both analytical relationships and experimental results confirm the calculation of an optimum load resistance which minimizes the RGE of the voltage amplifier and, simultaneously, that a more accurate voltage gain can be obtained if the nominal values of the CCII parasitic resistances are taken into account. The reported findings provide design rules to implement, also at transistor level in a standard CMOS technology, CCII-based voltage amplifiers with low relative gain errors, which are of special interest for sensor interfaces and measurement systems.