Parasitic series resistance extraction and impact ionization current modeling for SOI MOSFETs

Abstract The impact ionization phenomenon in submicron lightly doped drain (LDD) silicon-on-insulator(SOI) metal-oxide semiconductor field-effect transistors (MOSFETs) is investigated using devices with body terminals. It is shown that an accurate model for the imact ionization current in submicron LDD SOI MOSFETs has to account for the voltage drop on the parasitic source-and-drain series resistances and the gate-voltage-dependent saturation field in the expression for the maximum channel electric field E m . It is demonstrated that the plot of I IMP (I D E m ) versus 1 E m is a single straight line for a given technology. In addition, a new numerical extraction method is proposed to determine the voltage-dependent drain-and-source parasitic series resistances and effective channel length of LDD SOI MOSFETs. The method is based on measuring output resistances of transistors with varying channel length.