Ultra-low power TFTs with 10 nm stacked gate insulator fabricated by nitric acid oxidation of Si (NAOS) method
2010
We have succeeded in fabrication of ultra-low power poly-Si based thin film transistors (TFTs) with 10 nm gate insulators and 1 V driving voltage. An ultrathin interfacial SiO 2 layer formed in 68 wt% nitric acid (HNO 3 ) aqueous solutions at 120°C decreases a gate leakage current by two orders of magnitude, resulting in a high on/off ratio of 10 9 .
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