Old Web
English
Sign In
Acemap
>
Paper
>
Low-power Embedded Perpendicular STT-MRAM Design for Cache Memory
Low-power Embedded Perpendicular STT-MRAM Design for Cache Memory
2015
Noguchi Hiroki
Ikegami Kazutaka
Kushida Keiichi
Abe Keiko
Itai Shogo
Takaya Satoshi
Tanaka Chika
Kamata Chikayoshi
Amano Minoru
Kitagawa Eiji
Shimomura Naoharu
Kawasumi Atsushi
Hara Hiroyuki
Ito Junichi
Fujita Shinobu
Keywords:
Interleaved memory
Parallel computing
Page cache
Cache-only memory architecture
Perpendicular
Computer science
Magnetoresistive random-access memory
Non-uniform memory access
CPU cache
Semiconductor memory
Correction
Source
Cite
Save
Machine Reading By IdeaReader
0
References
0
Citations
NaN
KQI
[]