Influence of Micro-Defect Morphology on Intrinsic Gettering Effectiveness and Durability in CMOS Epitaxial Processing

The morphology of micro-defects located in the bulk of Cz-grown silicon wafers was observed to be dependent on wafer thermal history, wafer dopant species and concentration, and wafer position in the grown silicon ingot (seed, center or tail section). Intrinsic gettering effectiveness and durability due to SiOx precipitates and/or stacking faults formed during various gettering sequences were investigated. Based on preliminary results, stacking fault micro-defects combined with SiOx micro-defects are preferred for maximum durability of the intrinsic gettering mechanism.