Built-in self-testing method of FPGA input/output module

The present invention provides a built-in self-testing method of FPGA input/output module. Firstly all input/output modules in FPGA are configured to that a bidirectional IO buffer is used as a circuit to be tested. The logical resource of middle part of FPGA device is configured to a test vector generating circuit. The logical resource surrounding the IO buffer is configured to an output response analysis circuit of scanning chain structure. In testing, the test vector generating circuit generates a pseudo-random exhaustive vector for exerting a test pattern for each circuit to be tested; after executing the test vector, actuating the operation of scanning chain of output response analysis circuit, outputting the built-in self-testing result which is configured this time by the input/output module in the control of test clock by the output response analysis circuit until when the test covers all resources in the input/output module. The method of the invention has the following advantages: simplified built-in self-testing result retrieval mode, reduced test configuration number of times, reduced test cost and increased test efficiency under the precondition of guaranteeing 100% test coverage rate.