A 2.4 GHz Fully Integrated Linear CMOS Power Amplifier With Discrete Power Control
2009
A fully integrated 2.4 GHz CMOS power amplifier (PA) in a standard 0.18 mum CMOS process is presented. Using a parallel-combining transformer (PCT) and gate bias adaptation, a discrete power control of the PA is achieved for enhancing the efficiency at power back-off. With a 3.3 V power supply, the PA has a peak drain efficiency of 33% at 31 dBm peak output power. By applying discrete power control, a reduction of 650 mA in current consumption can be achieved over the low output power range while satisfying the EVM requirements of WLAN 802.11g and WiMAX 802.16e signals.
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