Surface Strained Ge-Cz Wafers by Sn-Implantation for High Electron and Hole Mobility

Ge-epi on Si wafers contain >1E7/cm2 TDD which degrades junction leakage and potentially also degrade mobility. Therefore we investigated using Ge-Cz wafers as an alternative free of Ge-epi TDD and observed that surface Sn implantation up to 16% can induce surface tensile strain-Ge measured by XRD enhancing top 30nm n-well surface layer mobility (µe) by 2.5x from 500cm2/Vs up to 1250cm2/Vs but the surface tensile strain-Ge degraded top 30nm p-well surface layer mobility (µh) by 73% from 3000cm2/Vs to 800cm2/Vs and surface bulk mobility by 74% from 1850cm2/Vs to 480cm2/Vs.