Design of a Novel CMOS Front-End ASIC With Post Digital Shaping for CZT-Based PET Detector

This paper presents a novel front-end Application Specific Integrated Circuit (ASIC) dedicated to CZT detectors for positron-emission tomography (PET) imaging applications. The ASIC consists of a preamplifier using split-leg topology, a variable gain amplifier, a time-interleaved ramp ADC and a timing controller. The design techniques of these circuit blocks are discussed in detail. Meanwhile, the digital CR-RC shaping and the digital trapezoidal shaping are introduced as well. A prototype ASIC is implemented in CMOS $0.35~\mu \mathrm {m}$ process. The preliminary results have been obtained. The detection range of the gamma ray is from 11.2 keV to 550 keV. The non-linearity of the output voltage is less than 3%. The gain of the readout channel is 40.2 V/pC. The test results show that the proposed front-end electronics is appropriable for PET imaging applications.