Thin film transistor array panel

The invention provides a thin film transistor (TFT) array panel, a second conductive layer thereof is of a multi-layered structure and is formed to be a source electrode and a drain electrode arranged at an interval, and the second conductive layer of the multi-layered structure includes a first sub-layer, a second sub-layer located on the first sub-layer, a third sub-layer located on the second sub-layer, and at least one additional sub-layer located between the first sub-layer and the second sub-layer. The first sub-layer, the third sub-layer and the additional sub-layer include metallic oxide materials containing indium and zinc. A groove is formed in the second conductive layer between the source and the drain electrodes, and runs through the first sub-layer, the second sub-layer, the third sub-layer and the additional sub-layer.