High-quality image processing architecture for facsimiles

A total and coherent image processing architecture for G3/G4/ISDN facsimiles is proposed that features high-quality multi-level processing by means of correlative area scanning and a software-oriented processing architecture. This image processing LSI controller includes a resolution converter and error diffusion halftone processing circuits in 4000 gates. A semi-superfine scanning mode is evaluated, which will be adopted as a new CCITT G3 optional mode.